VCD files, or Value Change Dump files, are a standardized ASCII format used to store simulation data from Verilog and other hardware description languages. They are primarily utilized for recording and analyzing the changes in values of variables during a simulation.
VCD files are generated by simulation tools to capture the state changes of signals over time. This data can be visualized using waveform viewers, allowing designers to analyze the behavior of their digital designs.
VCD Types
A VCD file contains data regarding changes in values for selected variables within a design, which are recorded by VCD system tasks. There are two types of VCD files:
- Four-state: This type represents variable changes in the states 0, 1, x, and z without including strength information.
- Extended: This type captures variable changes across all states and includes strength information.
VCD Structure
A VCD file consists of several key sections.
Header Section
It contains metadata such as the date of creation, version of the simulator, and timescale information and is specified within $<keyword>
and $end
.
Keyword | Description |
---|---|
$comment | Inserts a comment in the VCD file |
$date | Indicates the date on which the VCD file was generated |
$enddefinitions | Indicates the date on which the VCD file was generated |
$timescale | Specifies what timescale was used for the simulation |
$version | Indicates which version of the VCD writer was used to produce the VCD file |
$date April 11, 2021 10:05:41
$end
$version ICARUS-VERILOG 2.5
$end
$timescale 1 ns
$end
Variable Definitions
This section is still within the header and lists all signals being monitored, including their types and identifiers.
Keyword | Description |
---|---|
$scope | Defines the scope of the variables being dumped |
$var | Prints the names and identifier codes of the variables being dumped |
$upscope | Indicates a change of scope to the next higher level in the design hierarchy |
$enddefinitions | Marks the end of the header information and definitions |
For example, the section shown below defines the scope and the signals being monitored (signal_a, signal_b, and signal_c), along with their types and identifiers.
$comment
List all signals to be monitored next
$end
$scope module logic $end
$var wire 1 a signal_a $end
$var wire 1 b signal_b $end
$var wire 1 c signal_c $end
$upscope $end
$enddefinitions $end
Value Change Section
Records the time at which each signal changes its value, along with the new value.
#0
b0 a
b0 b
b0 c
#10
b1 a
#20
b1 b
#30
b1 c
#40
b0 a
#50
b0 b
#60
b0 c
Each timestamp records a change in value of all signals updated in that time unit. For example, at 40ns signal_a goes to 0 as indicated by the identifier a .